this document contains information on a new product. specifications and information are subject to change without notice wj communications, inc ? phone 1-800-wj1-4401 ? fax: 408-577-6620 ? e-mail: sales@wj.com ? web site: www.wj.com march 2002 the communications ed g e tm preliminary product information fp1189 ? watt hfet product features ? dc ? 4000 mhz ? +28 dbm p1db ? +40 dbm output ip3 ? high drain efficiency ? 17 db gain @ 1900 mhz ? mtbf >100 years ? sot-89 smt package product description the fp1189 is a high performance ?-watt hfet (heterostructure fet) in a low-cost sot-89 surface- mount package. this device works optimally at a drai n b ias of +8 v and 100 ma to achieve +40 dbm outpu t ip3 performance and an output power of +28 dbm a t 1-db compression. the device conforms to wj communications? long history of producing high reliability and qualit y components. the fp1189 has an associated mtbf o f over 100 years at a mounting temperature of 85 c. all devices are 100% rf & dc tested. the product is targeted for use as driver amplifiers fo r wireless infrastructure where high performance and high efficiency is required. functional diagram 1 3 2 4 function pin no. input 1 ground 2 output/bias 3 ground 4 specifications dc electrical parameter units min typ max saturated drain current 1 , i dss ma 300 transconductance, g m ms 175 pinch off voltage 2 , v p v -2.0 parameters 3 units min typ max frequency range mhz dc 4000 small signal gain, gss db 17 output p1db dbm +28 output ip3 4 dbm +40 thermal resistance c/w 70 1. i dss is measured with v gs = 0 v, v ds = 3 v. 2. pinch-off voltage is measured when i ds = 0.8 ma. 3. test conditions unless otherwise noted: t = 25oc, v ds = 8 v, i dq = 100 ma, frequency = 1960 mhz in an application circuit with z l = z lopt , z s = z sopt . 4. 3oip measured with two tones at an output power of +15 dbm/tone separated by 1 mhz. the suppression on the largest im3 product is used to calculate the 3oip using a 2:1 rule. absolute maximum ratings parameters rating operating case temperature -40 to +85 c storage temperature -40 to +125 c maximum dc power 2 w rf input power (continuous) +20 dbm operation of this device above any of there parameters may cause permanent damage typical parameters parameter units typical frequency mhz 900 1960 2140 s21 db tbd 16.5 17 s11 db tbd -23 -30 s22 db tbd -6 -7 output p1db dbm tbd +28 +28 output ip3 dbm tbd +40 +40 noise figure db tbd 3.8 3.9 drain voltage v tbd +8.0 +8.0 drain current ma tbd 100 100 1. the drain current is the quiescent current at small signal output levels. the current may increase as the output power is increased near its compression point. ordering information part no. description fp1189 ?-watt hfet (available in tape & reel) FP1189-PCB-900 900 mhz application circuit fp1189-pcb-1900 1900 mhz application circuit
this document contains information on a new product. specifications and information are subject to change without notice wj communications, inc ? phone 1-800-wj1-4401 ? fax: 408-577-6620 ? e-mail: sales@wj.com ? web site: www.wj.com march 2002 the communications ed g e tm preliminary product information fp1189 ? watt hfet application circuit: 1960 mhz r6 8.2 k ? vdd = +8 v vgg = -4 v umt1n 6 1 5 2 4 3 connected to v dd on app circuit connected to v gg on app circuit r5 8.2 k ? r3 220 ? r4 2 ? 1% 0603 application note special attention should be taken to properly bias up the hfets. power suppl y sequencing is required to prevent the device from operating at 100% i dss for a prolonge d p eriod of time and possibly causing damage to the device. it is recommended that fo r the safest operation, the negative supply be ?first on and last off.? with a negative gate voltage present, the drain voltage can then be applied to the device. the gate voltage can then be adjusted to have the device be used at the proper quiescent bias condition. an optional temperature-compensation active-bias circuit is recommended for use wit h the application circuit, which requires two standard voltage supplies +8v and -4v, an d is set for an optimal drain bias of +8v @ 100 ma. the circuit schematic, shown on the right, uses dual pnp transistors to provide a constant drain current into the fet and also eliminating the effects of pinchoff variation. temperature compensation is achieved b y tracking the voltage variation with the temperature of the emitter-to-base junction of the pnp transistors. thus the transistor emitter voltage adjusts the voltage incident at the gate of the fet so that the device draws a constant current, regardless of the temperature. two fixed voltage supplies are needed for operation. a rohm dual transistor, umt1n, and a dual-chip resistor (8.2 k ? ) are recommended to minimize board space and help decrease the current variability through r4 with the components being matched to one another. the active-bias circuit can directly be attached to the voltage supply ports in the circuit diagram as shown above (v dd and v gg ). v dd + 8 v @ 250 ma fp1189 sot-89 pin 1 pin 3 pin 2,4 rf out rf in l1 10 nh c2 56 pf v gg c3 2.2 pf r1 20 ? c7 .018 f r2 5.1 ? l2 22 nh c8 .018 f mlin mlin mlin mlin c5 0.6 pf mlin c6 56 pf c4 0.6 pf c1 0.6 pf typical specifications frequency 1960 s21 - gain 16.5 db s11 - input r.l. -23 db s22 - output r.l. -6 db output p1db +28 dbm output ip3 +40 dbm noise figure 3.8 db v dd +8.0 v i dd 1 100 ma 1 i dd is the quiescent current at small signal output levels. the current may increase as the output power is increased near its compression point. s-parameters -30 -20 -10 0 10 1930 1940 1950 1960 1970 1980 1990 frequency (mhz) s11, s22 (db) 14 15 16 17 18 s21 (db) s21 s11 s22
this document contains information on a new product. specifications and information are subject to change without notice wj communications, inc ? phone 1-800-wj1-4401 ? fax: 408-577-6620 ? e-mail: sales@wj.com ? web site: www.wj.com march 2002 the communications ed g e tm preliminary product information fp1189 ? watt hfet
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